Handling Of Overflows; Notes On Use; Access - Hitachi SH7095 Hardware User Manual

4. After the operation, the 32-bit remainder is written to DVDNTH and the 32-bit quotient is
written to DVDNT.
10.3.3

Handling of Overflows

When the results of operations exceed the ranges expressed as signed 32 bits (when, in division
between two negative numbers, the quotient is the maximum value and a remainder (negative
number) is generated), or when the divisor is 0, an overflow will result.
When overflows occur, the OVF bit is set and overflow interrupts are generated when generation
of interrupts that set the OVFIE bit of DVCR to 1 are enabled. The operation will then end with
the result after 6 cycles of operation stored in the DVDNTH and DVDNTL registers. When
interrupts that clear the OVFIE bit to 0 are disabled, the operation will end with the operation
result at 6 cycles set in DVDNTH and the maximum value H'7FFFFFFF and minimum value
H'80000000 set in DVDNTL. In the SH7095, the maximum value is resulted when a positive
quotient overflows; the minimum value is when a negative quotient overflows. The first three
cycles of the 6 cycles executed when an overflow occurs are used for flag setting within the
division unit and the next three for division.
10.4

Notes on Use

10.4.1

Access

All accesses to the division unit except DVCR and VCRDIV must be 32-bit reads or writes. Word
accesses to registers other than DVCR and VCRDIV result in readout or writing of undefined
values. In the division unit, a read instruction is extended for one cycle immediately after an
instruction that writes to a register, even if the register is identical, to ensure that the value written
is accurately set in the destination register in the division unit.
When a read or write instruction is issued while the division unit is operating, the read or write
instruction is continuously extended until the operation ends. This means that instructions that do
not access the divider can be parallel processed. When an instruction is executed that writes to any
register of the division unit immediately following an instruction that writes to the division start-
up registers (DVDNTL or DVDNT), the correct value may not be set in the start-up register.
Specify something other than an instruction that writes to a division unit register for the instruction
soon after any instruction that writes to a start-up register.
Because of the above restrictions, a read instruction should be issued 39 cycles after starting up the
operation for efficient program design.
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