Use Examples - Hitachi SH7095 Hardware User Manual

generated before the next instruction is executed. If a break condition is set on an interrupt-
disabled instruction, the break occurs before the instruction that accepts the next interrupt is
executed, so the PC value saved is the address of the break.
3. Break on Data Access (CPU/Peripheral): The program counter (PC) value is the top address
of the next instruction after the last instruction executed before the user break exception
processing started. When data access (CPU/peripheral) is set as a break condition, the place
where the break will occur cannot be specified exactly. The break will occur at the instruction
fetched close to where the data access that is to receive the break occurs.
6.3.6

Use Examples

Break on a CPU Instruction Fetch Bus Cycle:
(A) Register settings:
Conditions set (A ch/B ch independent mode):
A ch:
B ch:
A user break will occur after the instruction at address H'00000404 is executed, or a user break
will be generated before the execution of the instruction at address H'00008010–H'00008016.
(B) Register settings:
Conditions set (A ch to B ch sequential mode):
A ch:
B ch:
BARA = H'00000404, BAMRA = H'00000000, BBRA = H'0054
BARB = H'00008010, BAMRB = H'00000006, BBRB = H'0054
BDRB = H'00000000, BDMRB = H'00000000
BRCR = H'1400
Address = H'00000404, address mask H'00000000
Bus cycle = CPU, instruction fetch (after execution), read
(operand size not included in conditions)
Address = H'00008010, address mask H'00000006
Data H'00000000, data mask H'00000000
Bus cycle = CPU, instruction fetch (before execution), read
(operand size not included in conditions)
BARA = H'00037226, BAMRA = H'00000000, BBRA = H'0056
BARB = H'0003722E, BAMRB = H'00000000, BBRB = H'0056
BDRB = H'00000000, BDMRB = H'00000000
BRCR = H'1010
Address = H'00037226, address mask H'00000000
Bus cycle = CPU, instruction fetch (before execution), read, word
Address = H'0003722E, address mask H'00000000
Data H'00000000, data mask H'00000000
Bus cycle = CPU, instruction fetch (before execution), read, word
Hitachi 111