Hitachi SH7095 Hardware User Manual page 503

INTC
Vector number setting register
WDT (VCRWDT)
Item 15 14
Bit name WIT WIT WIT WIT WIT WIT WIT
– V6
Initial Value 0 0
R/W R R/W R/W R/W R/W R/W R/W R/W
Bit
14 to 8 Watchdog timer (WDT) interval
interupt vector number (WITV6-
6 to 0 Bus state controller (BSC) compare
match interrupt vector number
Vector number setting register
DIV (VCRDIV)
Item 31 30
Bit name – –
Initial Value 0 0
R/W R R
Item 15 14
Bit name
Initial Value – –
R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Bit
15 to 0 (Sets vector number)
492 Hitachi
H'FFFFFEE4
13 12 11
V5 V4 V3
0 0 0
Bit nam
WITV0)
(BCMV6- BCMV0)
H'FFFFFF0C
29 28 27
– – –
0 0 0
R R R
13 12 11
– – –
Bit nam
Bit
10 9 8 7
V2 V1 V0 –
0 0 0 0
R
These bits set the vector number for the interval
interrupt (ITI) of the watchdog timer (WDT).
These bits set the vector number for the compare
match interrupt (CMI) of the bus state controller
Bit
26 25 24 23
– – – –
0 0 0 0
R R R R
10 9 8 7
– – – –
These bits set the vector number for the interrupt
when the interrupt is occurred by the overflow or
underflow of the division unit.
8/16
6 5 4 3
BCM BCM BCM BCM BCM BCM BCM
V6 V5 V4 V3
0 0 0 0
R/W R/W R/W R/W R/W R/W R/W
Description
(BSC).
32
22 21 20 19
– – – –
0 0 0 0
R R R R
6 5 4 3
– – – –
Description
2 1 0
V2 V1 V0
0 0 0
18 17 16
– – –
0 0 0
R R R
2 1 0
– – –