Transmit Shift Register; Transmit Data Register; Serial Mode Register - Hitachi SH7095 Hardware User Manual

Bit:
Bit name:
Initial value:
R/W:
13.2.3

Transmit Shift Register

The transmit shift register (TSR) transmits serial data. The SCI loads transmit data from the
transmit data register (TDR) into the TSR, then transmits the data serially from the TxD pin, LSB
(bit 0) first. After transmitting one data byte, the SCI automatically loads the next transmit data
from the TDR into the TSR and starts transmitting again. If the TDRE bit of the SSR is 1,
however, the SCI does not load the TDR contents into the TSR. The CPU cannot read or write the
TSR directly.
Bit:
Bit name:
R/W:
13.2.4

Transmit Data Register

The transmit data register (TDR) is an eight-bit register that stores data for serial transmission.
When the SCI detects that the transmit shift register (TSR) is empty, it moves transmit data written
in the TDR into the TSR and starts serial transmission. Continuous serial transmission is possible
by writing the next transmit data in the TDR during serial transmission from the TSR.
The CPU can always read and write the TDR. The TDR is initialized to H'FF by a reset or in
standby and module standby modes.
Bit:
Bit name:
Initial value:
R/W:
13.2.5

Serial Mode Register

The serial mode register (SMR) is an eight-bit register that specifies the SCI serial communication
format and selects the clock source for the baud rate generator.
326 Hitachi
7 6
0 0
R R
7 6
— —
7 6
1 1
R/W R/W R/W
5 4
0 0
R R
5 4
— — —
5 4
1 1
R/W R/W
3 2
0 0
R R
3 2
— —
3 2
1 1
R/W R/W
1 0
0 0
R R
1 0
—
1 0
1 1
R/W