Hitachi SH7095 Hardware User Manual page 57

Table 2.19 Power-Down State
Mode Conditions
Sleep Execute
mode SLEEP
instruction
with SBY bit
cleared to 0
in SBYCR
Standby Execute
mode SLEEP
instruction
with SBY bit
set to 1 in
SBYCR
Module MSTP4–
standby MSTP0 bits
function of SBYCR
(SH7095 set to 1
only)
Notes: 1. Differs depending on peripheral module and pin.
2. The DMAC, MULT, DIV registers and the specified interrupt vectors maintain their
settings.
Hitachi 46
On-Chip
Peripheral
Clock CPU Modules
Run Halt Run
Halt Halt Halt and
initialize
Run Run Supply of clock
(MULT to affected
is module is
halted. halted and
) module
initialized.
State
CPU
Register
s
Held
Held
*1
Held
*2
RAM Canceling
Held 1. Interrupt
2. DMA
address
error
3. Power-
on reset
4. Manual
reset
Undefine 1. NMI
d
2. Power-
on reset
3. Manual
reset
Held Clear bits
MSTP 4–0
of SBYCR
to 0