Emulator - Hitachi SH7095 Hardware User Manual

7.11.3

Emulator

When using the SH7095's emulator, operation differs from real chip operation in the following
ways.
To get trace data with the emulator, all accesses performed by the CPU and DMAC must be output
externally. It is not possible to completely analyze program execution or the contents of the data
accessed with only traces of access cycles performed exterior to the chip.
Reads of the cache from the CPU can be performed using only the cache bus, but the access
address and data read must be able to use the internal bus and external bus to be output externally.
The external bus is not needed to access on-chip peripheral modules with the CPU or DMAC, but
it is needed to output trace data. This means that when the emulator is used in the trace data fetch
mode, internal access operations of the CPU or DMAC are not performed in parallel with the
external bus cycle, so extra execution time is required compared to actual chips. Parallel execution
of accesses that follow writing to external destinations also should be executed after writing is
completed to carry out traces. To precisely measure the actual execution time, an actual chip rather
than an emulator should be used.
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