Cache Control Register (Ccr) - Hitachi SH7095 Hardware User Manual

8.2

Cache Control Register (CCR)

Table 8.1 Cache Control Register
Name
Cache control register
The cache control register is used for cache control. The cache control register (CCR) must be set
and the cache must be initialized before use.
Bit:
Bit name:
Initial value:
R/W:
• Bits 7 and 6—Way Specification (W1 to W0): W1 and W0 specify the way when an address
array is directly accessed by address specification.
00: Way 0 (Initial value)
01: Way 1
10: Way 2
11: Way 3
204 Hitachi
Figure 8.2 Address
Abbrev.
CCR
7 6
W1 W0
0 0
R/W R/W
R/W Initial Value
R/W H'00
5 4
— CP TW
0 0
R R/W R/W
Address
H'FFFFFE92
3 2
OD ID
0 0
R/W R/W
1 0
CE
0 0
R/W