Hitachi SH7095 Hardware User Manual page 530

Cache control register (CCR)
Item 7
Bit Name W1
Initial Value 0
R/W R/W
Bit Bit Name
7, 6 Way specification
(W1 and W0)
4 Cache purge (CP)
3 Two-way mode (TW)
2 Data replacement
disable (OD)
1 Instruction replacement
disable (ID)
0 Cache enable (CE)
H'FFFFFE92
6 5
W0 –
0 0
R/W R/W
Value
0 0 Way 0 (initial value)
0 1 Way 1
1 0 Way 2
1 1 Way 3
0 Nomal operation (initial value)
1 Cache purge
0 Four-way mode (initial value)
1 Two-way mode
0 Nomal operation (initial value)
1 Data not replaced even when cache missed in data
access
0 Nomal operation (initial value)
1 Data not replaced even when cache missed in instruction
fetch
0 Cache disabled (initial value)
1 Cache enabled
8
Bit
4 3
CP TW
0 0
R/W R/W
Description
CCR
2 1
OD ID
0 0
R/W R/W
Hitachi 519
0
CE
0
R/W