Hitachi SH7095 Hardware User Manual page 9

11.1.4 Register Configuration .......................................................................... 287
11.2 Register Descriptions ....................................................................................... 288
11.2.1 Free-Running Counter (FRC).................................................................. 288
11.2.2 Output Compare Registers A and B (OCRA and OCRB).............................. 288
11.2.3 Input Capture Register (ICR) .................................................................. 289
11.2.4 Timer Interrupt Enable Register (TIER).................................................... 289
11.2.5 Free-Running Timer Control/Status Register (FTCSR) ................................ 290
11.2.6 Timer Control Register (TCR) ................................................................ 292
11.2.7 Timer Output Compare Control Register (TOCR)....................................... 293
11.3 CPU Interface................................................................................................. 295
11.4 Operation....................................................................................................... 298
11.4.1 FRC Count Timing ............................................................................... 298
11.4.2 Output Timing for Output Compare ......................................................... 299
11.4.3 FRC Clear Timing................................................................................ 299
11.4.4 Input Capture Input Timing .................................................................... 300
11.4.5 Input Capture Flag (ICF) Set Timing........................................................ 301
11.4.6 Output Compare Flag (OCFA, OCFB) Set Timing...................................... 301
11.4.7 Timer Overflow Flag (OVF) Set Timing ................................................... 302
11.5 Interrupt Sources............................................................................................. 303
11.6 Example of Using the FRT................................................................................ 303
11.7 Notes on Use .................................................................................................. 304
Section 12 Watchdog Timer (WDT)
12.1 Overview....................................................................................................... 309
12.1.1 Features.............................................................................................. 309
12.1.2 Block Diagram..................................................................................... 310
12.1.3 Pin Configuration ................................................................................. 310
12.1.4 Register Configuration .......................................................................... 311
12.2 Register Descriptions ....................................................................................... 311
12.2.1 Watchdog Timer Counter (WTCNT)........................................................ 311
12.2.2 Watchdog Timer Control/Status Register (WTCSR).................................... 312
12.2.3 Reset Control/Status Register (RSTCSR) .................................................. 313
12.2.4 Register Access.................................................................................... 314
12.3 Operation....................................................................................................... 316
12.3.1 Operation in the Watchdog Timer Mode ................................................... 316
12.3.2 Operation in the Interval Timer Mode....................................................... 318
12.3.3 Operation in the Standby Mode............................................................... 318
12.3.4 Timing of Setting the Overflow Flag (OVF) .............................................. 319
12.3.5 Timing of Setting the Watchdog Timer Overflow Flag (WOVF).................... 319
12.4 Notes on Use .................................................................................................. 320
12.4.1 WTCNT Write and Increment Contention ................................................. 320
12.4.2 Changing CKS2 to CKS0 Bit Values........................................................ 320
12.4.3 Changing Watchdog Timer/Interval Timer Modes ...................................... 320
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