Hitachi SH7095 Hardware User Manual page 155

when the WAIT signal is asserted in the T1 cycle or the first Tw cycle. The WAIT signal is
sampled at the clock rise. External waits should not be inserted, however, into word accesses of
devices (such as ordinary space and burst ROM) that have a 8-bit bus width (byte size). Control
waits in such cases with software only.
Figure 7.12 Wait State Timing of Ordinary Space Access (Wait States from WAIT Signal)
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