Data Transfer Control Registers (Dtcr) - Hitachi H8/3006 Hardware Manual

7.2.4

Data Transfer Control Registers (DTCR)

A data transfer control register (DTCR) is an 8-bit readable/writable register that controls the
operation of one DMAC channel.
Bit 7
DTE
Initial value 0
Read/Write R/W
Data transfer enable
Enables or disables
data transfer
The DTCRs are initialized to H'00 by a reset and in standby mode.
Bit 7—Data Transfer Enable (DTE): Enables or disables data transfer on a channel. When the
DTE bit is set to 1, the channel waits for a transfer to be requested, and executes the transfer when
activated as specified by bits DTS2 to DTS0. When DTE is 0, the channel is disabled and does not
accept transfer requests. DTE is set to 1 by reading the register when DTE is 0, then writing 1.
Bit 7
DTE Description
0 Data transfer is disabled. In I/O mode or idle mode, DTE is cleared to 0
when the specified number of transfers have been completed
1 Data transfer is enabled
If DTIE is set to 1, a CPU interrupt is requested when DTE is cleared to 0.
6 5
DTSZ DTID
0 0
R/W R/W
Data transfer size
Selects byte or
word size
Data transfer
increment/decrement
Selects whether to
increment or decrement
the memory address
register
4 3
RPE DTIE
0 0
R/W R/W
Data transfer interrupt enable
Enables or disables the CPU interrupt
at the end of the transfer
Repeat enable
Selects repeat
mode
2 1
DTS2 DTS1 DTS0
0 0
R/W R/W R/W
Data transfer select
These bits select the data
transfer activation source
(Initial value)
0
0
191