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CHAPTER 18 DTP/EXTERNAL INTERRUPT CIRCUIT
18.4.3
Request Level Setting Register (ELVR)
The request level setting register (ELVR) selects the level or edge of the signal input to
each DTP/external interrupt pin that is to be detected as a DTP/external interrupt cause.
■ Request Level Setting Register (ELVR)
Address
bit
15
000033
LB7
H
R/W
R/W: Read/write enabled
:Initial value
Table 18.4-4 Function Eescription of Each bit of the Request Level Setting Register (ELVR)
Bit name
bit15
LB7, LB0 to LA7, LA0:
to
Request detection
bit0
selection bits
Table 18.4-5 Correspondence between Request Level Setting Register (ELVR) and Each Channel
DTP/external interrupt pin
P63/INT7
P16/INT6
P15/INT5
P14/INT4
P13/INT3
P12/INT2/DTTI1
P11/INT1
P10/INT0/DTTI0
*: Pin name not applicable to MB90465 series
524
Figure 18.4-4 Request Level Setting Register (ELVR)
14
13
12
11
10
9
LA7 LB6 LA6 LB5 LA5 LB4 LA4
R/W
R/W
R/W
R/W
R/W
R/W
LB 7 to
LB 0
• Each of these bits selects the level or edge of the signal input to the DTP/
external interrupt pin to be detected as a DTP/external interrupt cause.
• Two bits are assigned to each pin.
(Reference)
If the selected detection signal is input to a DTP/external interrupt pin, the
external interrupt request flag bit is set to "1" regardless of the settings of the
DTP/interrupt enable register (ENIR).
Interrupt number
*
8
7
6
5
4
LB3
LA3 LB2 LA2 LB1 LA1 LB0 LA0
R/W
R/W
R/W
R/W
R/W
LA 7 to
External interrupt request detection selection bits
LA 0
0
0
L level is to be detected.
0
1
H level is to be detected.
1
0
Rising edge is to be detected.
1
Falling edge is to be detected.
1
Function
#27 (1B
)
H
#25 (19
)
H
#22 (16
)
H
#20 (14
)
H
Initial value
3
2
1
0
00000000
00000000
R/W
R/W
R/W
R/W
Bit name
LB7, LA7
LB6, LA6
LB5, LA5
LB4, LA4
LB3, LA3
LB2, LA2
LB1, LA1
LB0, LA0
B
B
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