Operation Of Position Detection - Fujitsu MB90460 Series Hardware Manual

F2mc-16lx 16-bit microcontroller
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15.6.1

Operation of Position Detection

This section describes the operation of the Position Detection Circuit. When the
effective position is detected, a Data Write Timing Output (WTIN1) will be generated to
the Data Write Control Unit and a Position Detect Interrupt is generated if the OPCR:
PDIE is set to "1".
■ Operation of Position Detection
The WTIN1 signal is generated by the Position Detection Circuit under the following conditions:
• A comparison match between SNI2 to SNI0 and RDA2 to RDA0, which is triggered by any effective
edge of SNI2 to SNI0.
• A detection of effective edge at SNIx which is enabled by the corresponding SEEx bit.
When the CMPE bit (bit8) of the Input Control Register (IPCR) is set to "0", only the edge detection of
SINx pins enabled by the SEE2 to SEE0 bits will engage in the edge detection operation for the position
detection. For instance, when only the SEE0 bit is set to "1", the input edge to the pin SNI0 is in effect, the
data write output signal is generated only when an effective edge is detected at the SIN0 pin. See Figure
15.6-3 for the timing diagram of the edge detection when CMPE = 0.
When the CMPE bit (bit8) of the Input Control Register (IPCR) is set to "1", the SNI2 to SNI0 will be
engaged in the comparison operation with the RDA2 to RDA0 bits. The comparison is triggered by any
edge change at SNI2 to SNI0 pins. See Figure 15.6-4 for the timing diagram of the edge detection when
CMPE = 1.
■ Edge Detection Timing Diagram (CMPE = 0)
CMPE
CPE1,
01
CPE0
SNI2
SNI1
SNI0
WTIN1
RISING EDGE
DETECTION
Figure 15.6-3 Edge Detection Timing Diagram (CMPE = 0)
FALLING EDGE
DETECTION
CHAPTER 15 MULTI-PULSE GENERATOR
10
11
BOTH EDGES
DETECTION
399

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