Fujitsu MB90460 Series Hardware Manual page 289

CHAPTER 13 16-BIT PPG TIMER
Table 13.4-2 PPG Control Register (PCNTL0 to PCNTL2)
Bit name
bit7,
Unused bit
bit6
IREN:
bit5 PPG interrupt
request enable bit
IRQF:
bit4
PPG interrupt flag bit
bit3, IRS1, IRS0:
bit2 Interrupt selection bit
POEN:
bit1
Output enable bit
OSEL:
bit0
Output inversion bit
270
• This read value is indeterminate.
• Writing to this bit has no effect on the operation.
• This bit enable or disables PPG interrupt request to the CPU.
• When this bit and the interrupt flag (IRQF) bit are "1", PPG outputs an interrupt
request.
• This bit is set to "1" when PPG interrupt occurs.
• Writing "0" will clear this bit.
• Writing "1" has no effect.
• In read-modify-write operation, "1" is always read.
• This bit is also cleared when EI
• These bits are used to select interrupt condition of the PPG timer.
• This bit enables or disables output from the PPG output pin.
• When this bit is "0", the pin functions as a general purpose port.
• When this bit is "1", the pin functions as a PPG timer output pin.
• This bit selects the polarity of PPG output pin.
• When this bit is "0", normal polarity is selected. PPG outputs "L" when 16-bit down
count value is greater than PDUT, and outputs "H" when smaller than or equals to
PDUT.
• When this bit is "1", the PPG output is inverted.
Function
2
OS is activated.