Fujitsu MB90460 Series Hardware Manual page 397

CHAPTER 15 MULTI-PULSE GENERATOR
■ Output Data Lower Register (OPDR)
Address bit 7
003FF8 OP31 OP30
H
R
X : Indeterminate
R/W : Readable and writable
: Initial value
— : Not used
378
Figure 15.4-5 Output Data Lower Register (OPDR)
6 5 4 3
OP21 OP20 OP11
R R R R
2 1 0 Initial value
OP10 OP01 OP00 XXXXXXXX
R R R
OP01 OP00
0 0
0 1
1 0
1 1
OP11 OP10
0 0
0 1
1 0
1 1
OP21 OP20
0 0
0 1
1 0
1 1
OP31 OP30
0 0
0 1
1 0
1 1
B
OPT0 output waveform selection bits
Pin OPT0 outputs "L" level.
Pin OPT0 outputs the output of the PPG
timer.
Pin OPT0 outputs the inverted output of
the PPG timer.
Pin OPT0 outputs "H" level.
OPT1 output waveform selection bits
Pin OPT1 outputs "L" level.
Pin OPT1 outputs the output of the PPG
timer.
Pin OPT1 outputs the inverted output of
the PPG timer.
Pin OPT1 outputs "H" level.
OPT2 output waveform selection bits
Pin OPT2 outputs "L" level.
Pin OPT2 outputs the output of the PPG
timer.
Pin OPT2 outputs the inverted output of
the PPG timer.
Pin OPT2 outputs "H" level.
OPT3 output waveform selection bits
Pin OPT3 outputs "L" level.
Pin OPT3 outputs the output of the PPG
timer.
Pin OPT3 outputs the inverted output of
the PPG timer.
Pin OPT3 outputs "H" level.