Fujitsu MB90460 Series Hardware Manual page 491

CHAPTER 17 UART
●
Control register 1 (SCR0/SCR1)
This register performs the following operations:
• Specifying whether to provide parity bits
• Selecting parity bits
• Specifying a stop bit length
• Specifying a data length
• Selecting a frame data format in mode 1
• Clearing a flag
• Specifying whether to enable transmission
• Specifying whether to enable reception
●
Status register 1 (SSR0/SSR1)
This register checks the transmission and reception status and error status, and enables and disables
transmission and reception interrupt requests.
●
Input data register 1 (SIDR0/SIDR1)
This register retains receive data. Serial input data is converted and stored in this register.
●
Output data register 1 (SODR0/SODR1)
This register sets transmission data. Data written to this register is converted to serial data and output.
472