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CHAPTER 4 RESET
■ Mode Fetch
When the reset is cleared, the CPU transfers the reset vector and the mode data stored in the hardware
memory to the appropriate registers in the CPU core. The reset vector and mode data are allocated to the
four bytes from FFFFDC
reset is cleared and fetches the reset vector and mode data. Using mode fetching, the CPU can begin
processing at the address indicated by the reset vector.
Figure 4.4-2 shows the transfer of the reset vector and mode data.
FFFFDF
H
FFFFDE
H
FFFFDD
H
FFFFDC
H
Reference:
Whether the reset vector and the mode data are read from internal ROM or from external memory is
specified by the setting of the mode pins. If external vector mode is specified by the mode pin
settings, the CPU will always read the reset vector and the mode data from external memory instead
of from internal ROM. If single-chip mode and internal ROM external bus mode are used, setting the
mode pins to specify internal vector mode is recommended.
●
Mode data (address: FFFFDF
Only the reset operation changes the contents of the mode register. The mode register setting is valid after
a reset operation. See "8.1 Mode Setting", for details about mode data.
●
Reset vector (address: FFFFDC
The execution start address after the reset operation ends is written as the reset vector.
Execution starts at the address contained in the reset vector.
72
to FFFFDF
H
Figure 4.4-2 Transfer of Reset Vector and Mode Data
Memory space
Mode data
Reset vector bit23 to bit16
Reset vector bit15 to bit8
Reset vector bit7 to bit0
)
H
to FFFFDE
H
. The CPU outputs these addresses to the bus immediately after the
H
Reset sequence
)
H
2
F
MC-16LX CPU
Mode
register
Micro-ROM
PCB
PC
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