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INDEX
B
Bank Addressing
Bank Addressing and Default Space..................... 36
Linear Addressing and Bank Addressing .............. 33
Bank Registers
Bank Registers (PCB,DTB,USB,SSB,ADB) ......... 54
Bank Registers and Access Space ........................ 35
Bank Select Prefixes
Bank Select Prefixes (PCB,DTB,ADB,SPB) ......... 58
BAP
Buffer Address Pointer (BAP) ........................... 143
Baud Rate
UART Baud Rate Selection............................... 490
Baud Rates
Baud Rates determined using the Dedicated Baud Rate
Generator ........................................... 492
Baud Rates determined using the External Clock
.......................................................... 497
Baud Rates determined using the Internal Timer
(16-bit Reload Timer 0) ....................... 495
Bidirectional Communication
Bidirectional Communication Function .............. 504
Bit Flash Memory
Characteristics of the 512K/1024K Bit Flash Memory
.......................................................... 588
Block Diagram
Block Diagram of 16-bit Free-run TImer ............ 283
Block Diagram of 16-bit Input Capture............... 284
Block Diagram of 16-bit Output Compare .......... 284
Block Diagram of 16-bit PPG Timer .................. 259
Block Diagram of 16-bit Timer.......................... 363
Block Diagram of Data Write Control Unit ......... 364
Block Diagram of Multi-functional Timer .......... 282
Block Diagram of Multi-functional Timer Pins
.......................................................... 287
Block Diagram of Multi-pulse Generator............ 359
Block Diagram of Multi-pulse Generator Pins
.......................................................... 368
Block Diagram of Port 0 Pins ............................ 168
Block Diagram of Port 1 Pins ............................ 174
Block Diagram of Port 2 Pins ............................ 179
Block Diagram of Port 3 Pins ............................ 184
Block Diagram of Port 4 Pins ............................ 189
Block Diagram of Port 5 Pins ............................ 194
Block Diagram of Port 6 Pins ............................ 199
Block Diagram of Position Detection Circuit ...... 366
Block Diagram of ROM Correction Function
.......................................................... 573
Block Diagram of the 16-bit PPG Timer Pins
.......................................................... 260
Block Diagram of the 16-bit Reload Timer ......... 233
Block Diagram of the 16-bit Reload Timer Pins
.......................................................... 235
Block Diagram of the 8/10-bit A/D Converter
.......................................................... 544
700
Block Diagram of the Clock Generation Block ..... 80
Block Diagram of the Delayed Interrupt Generator
Module .............................................. 536
Block Diagram of the DTP/external Interrupt Circuit
......................................................... 516
Block Diagram of the DTP/external Interrupt Circuit
Pins ................................................... 519
Block Diagram of the Low Power Consumption
Control Circuit...................................... 92
Block Diagram of the PWC Timer Pins.............. 436
Block Diagram of the Time-base Timer ............. 208
Block Diagram of the Watchdog Timer.............. 221
Block Diagram of UART.................................. 470
Block Diagram of UART Pins........................... 474
Block Diagram of Waveform Generator ............. 285
Block Diagram of Waveform Sequencer ............ 360
DTTI1 Circuit Block Diagram........................... 421
MB90460/465 Series Block Diagram..................... 7
Output Data Register Block Diagram................. 397
PWC Timer Block Diagram .............................. 435
ROM Mirroring Function Selection Module Block
Diagram ............................................. 584
Block Diagrams
Block Diagrams of the 8/10-bit A/D Converter Pins
......................................................... 546
Block Diagrams of the External Reset Pin ............ 69
Both Edges Detection
Both Edges Detection and SNIx/RDAx Comparison
Timing Diagram (CMPE=1) ................ 400
Buffer Address Pointer
Buffer Address Pointer (BAP)........................... 143
Bus Mode
Bus Mode........................................................ 158
Bus Mode Setting Bits...................................... 160
C
Calculating
Calculating the Execution Cycle Count .............. 654
CCR
Condition Code Register (CCR) Configuration
........................................................... 48
CDCR
Communication Prescaler Control Register (CDCR)
......................................................... 484
Characteristics
Characteristics of the 512K/1024K Bit Flash Memory
......................................................... 588
Chip
When the Chip/Sector Deletion Operation is Executed.
......................................................... 595
When the Write Operation or Chip/Sector Deletion
Operation is Executed.................. 597, 598
Chip deletion
Deleting the data (Chip deletion) ....................... 604
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