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15.6.4.2
When 16-bit Reload Timer Underflow
The timing change of the output pin OPTx, which is triggered by the 16-bit reload timer
0 underflow, is shown in Figure 15.6-14 and Figure 15.6-15.
■ Timing Generated by Reload Timer Underflow
No. 0
BNKF,
RDA2,
0100
RDA1,
RDA0
OPT5
OPT4
OPT3
OPT2
OPT1
OPT0
TIMER
STARTS
Figure 15.6-14 Timing Generated by Reload Timer Underflow
No. 4
No. 6
0010
0110
16-BIT RELOAD TIMER 0 UNDERFLOW OCCURS
CHAPTER 15 MULTI-PULSE GENERATOR
No. 3
No. 2
No. 1
0011
0001
0101
No. 5
No. A
1010
1011
409
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