Fujitsu MB90460 Series Hardware Manual page 146

■ Hardware Interrupt Structure
Table 7.4-1 lists four mechanisms used for hardware interrupt. These four mechanisms must be included in
the program before hardware interrupt can be used.
Table 7.4-1 Mechanisms used for Hardware Interrupt
Peripheral function
Interrupt controller
CPU
FFFC00
FFFFFF
These four mechanisms must be included in the program before hardware interrupt can be used.
■ Hardware Interrupt Suppression
Acceptance of hardware interrupt requests is suppressed under the following conditions.
●
Hardware interrupt suppression during writing to the peripheral function control register area
When data is being written to the peripheral function control register area, hardware interrupt requests are
not accepted. This prevents the CPU from making operational mistakes. The mistakes may be caused if an
interrupt request is generated during data is written to the interrupt control registers for a resource. The
peripheral function control register area is not the I/O addressing area at 000000
allocated to the control register of the peripheral function control register and data register.
Figure 7.4-1 shows hardware interrupt operation during writing to the built-in resource area.
Figure 7.4-1 Hardware Interrupt Request while writing to the Peripheral Function Control Register Area
Instruction that writes to the peripheral function control register area
Mechanism
Interrupt enable bit, interrupt
request bit
Interrupt control register (ICR)
Interrupt enable flag (I)
Interrupt level mask register
(ILM)
Microcode
to
H
Interrupt vector table
in memory
H
MOV A, #08 MOV io, A
An interrupt request
is generated here
Controls interrupt requests from a peripheral
function
Sets the interrupt level and controls EI
Identifies the interrupt enable status
Compares the request interrupt level and
current interrupt level
Executes the interrupt processing routine
Stores the branch destination address for
interrupt processing
MOV A, 2000H
Branches to
Does not branch
the interrupt
to the interrupt
CHAPTER 7 INTERRUPT
Function
to 0000FF , but the area
H H
Interrupt processing
2
OS
127