Fujitsu MB90460 Series Hardware Manual page 216

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Port operation in stop or time-base timer mode
If the pin state specification bit (SPL) in the low-power consumption mode control register (LPMCR) is
already "1" when the port is shifted to stop or time-base timer mode, the port pins are placed in a high-
impedance state. This is because the output buffer is turned off forcibly. Note that the inputs are fixed at a
certain level to prevent leakage due to an open circuit.
Table 9.8-4 lists the states of the port 5 pins.
Table 9.8-4 States of Port 5 Pins
Pin Normal operation
P50/AN0 to
General-purpose I/O port General-purpose I/O port General-purpose I/O port
P57/AN7
SPL : Pin state specification bit of low-power consumption mode control register (LPMCR)
Hi-Z: High impedance
Stop mode or time-base
Sleep mode
CHAPTER 9 I/O PORT
Stop mode or time-base
timer mode
(SPL = 0)
Input shut down/output in
Hi-Z
timer mode
(SPL = 1)
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