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• In the waveform sequencer, there is a 16-bit timer that can be used to measure the speed of the motor
and disable the OPT output in case of position detect missing.
• Forced stop control using DTTI1 pin input
External pin control can be performed through clockless DTTI1 pin input even when oscillation is
stopped. (The pin level can be set by each pin or software.) There is selectable noise filter for DTTI1
input. Table 15.1-2 shows the noise width for noise filter of DTTI1 pin.
Table 15.1-2 Noise Width for Noise Filter
Selection
1
2
3
4
●
PPG Synchronization for Output Signal
In order to avoid short pulse (or glitch) during sequencer state changes, the write timing (WTO) needs to be
delayed and synchronized with the next coming edge of PPG output waveform. See Figure 15.1-1 and
Figure 15.1-2 for details. This function can be enabled or disabled by software. WTS1 and WTS0 bits of
the Input Control Register (IPCR) are used to disable this function and to select the polarity of the PPG
edge to synchronize with.
Figure 15.1-1 PPG Rising Edge Synchronization
Asynchronous State Change
WTS1,WTS0 = 00
Synchronous State Change
WTS1,WTS0 = 01
Noise width for DTTI1 and SNI2 to SNI0 pins
PPG
B
OP5
OP4
B
OP5'
OP4'
Sequencer changes
state due to, e.g. the
reload timer 0 underflow.
CHAPTER 15 MULTI-PULSE GENERATOR
Cancel 4-cycle noise.
Cancel 8-cycle noise.
Cancel 16-cycle noise.
Cancel 32-cycle noise.
Glitch
357
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