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CHAPTER 16 PWC Timer
Figure 16.3-2 shows the block diagram of the PWC timer 1 pins.
Figure 16.3-2 Block Diagram of the PWC Timer 1 Pins
Resource output
Resource input
Resource output enable
Port data register (PDR)
PDR read
Output latch
PDR write
Pin
Port data direction register (DDR)
Direction latch
DDR write
DDR read
Standby control (SPL = 1)
437
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