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CHAPTER 7 INTERRUPT
■ Software Interrupt Operation
Figure 7.5-1 shows software interrupt operation from the generation of a software interrupt to the
completion of interrupt processing.
PS
I
S
IR
B unit:
(1) A software interrupt instruction is executed.
(2) The dedicated registers are saved according to the microcode that corresponds to the software
interrupt instruction, and other necessary processing is performed. Branch processing is then executed.
(3) The RETI instruction in the user interrupt processing routine terminates the interrupt processing.
Note:
When the program bank register (PCB) is FF
INT #vct8 instruction table. When creating the software, be careful of the duplicated address of the
CALLV instruction and INT #vct8 instruction.
138
Figure 7.5-1 Software Interrupt Operation
Register file
(2)
Microcode
2
F
MC-16LX CPU
Save
:
Processor status
:
Interrupt enable flag
:
Stack flag
:
Instruction register
Bus interface unit
(1)
PS
I
IR
Queue
Instruction bus
RAM
, the vector area of the CALLV instruction overlaps the
H
S
B unit
Fetch
(3)
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