Fujitsu MB90460 Series Hardware Manual page 404

Table 15.4-7 Input Control Upper Register (IPCUR) Bits
Bit name
WTS1, WTS0:
bit15, PPG edge
bit14 synchronization
selection bits
CPIF:
Comparison
bit13
interrupt request
flag bit
CPIE:
Comparison
bit12
interrupt request
enable bit
bit11 CPD2 to CPD0:
to Comparison
bit9 bits
CMPE:
Position
bit8 detection
comparison
enable bit
• These bits are used to select the synchronization edge of the next coming of PPG
signal with the write timing.
• Comparison interrupt request flag.
• It is a comparison interrupt request flag for the comparison circuit. When the
SNI2 to SNI0 bits are compared and matched with the CPD2 to CPD0 bits, this
bit is set to "1".
• When comparison interrupt enable bit (CPIE) is also set to "1", the interrupt is
generated.
• This bit is cleared by writing "0". Writing "1" has no effect.
• In read-modify-write operation, "1' is always read.
• Comparison interrupt enable bit.
• When this bit is set to "1" and the comparison interrupt request flag (CPIF) is
also set to "1", the interrupt is generated.
• These bits are used to compare with the RDA2 to RDA0 bits of the Output Data
Register, when the value of these bits are matched with the value of RDA2 to
RDA0 bits, the compare interrupt flag (CPIF) is set to "1".
• This bit is used to enable the comparison operation for the position detection.
CHAPTER 15 MULTI-PULSE GENERATOR
Function
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