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CHAPTER 16 PWC Timer
Table 16.4-2 PWC Control Status Register (PWCSL0/PWCSL1)
Bit name
bit7,
CLK1,CLK0:
bit6
Clock select bits
bit5,
Reserved bits
bit4
S/C:
bit3
Singe/continuous bit
bit2
MOD2 to MOD0:
to
Operation mode bits
bit0
442
• CKS1 and CKS0 bits are used to select the internal count clock. These bits are used to select
the internal count clock.
• After reset, the bits are initialized to "00
cannot be set.
(Note)
After the timer is started, changing the setting is prohibited. Write these bits before
the timer is started or after the timer is stopped.
• There bits are reserved. Always write "00
• The S/C bit is used to select the count mode.
• After reset, the bit is initialized to "0". The bit can be read and written.
(Note)
After the timer is started, changing the setting is prohibited. Write this bit before the
timer is started or after the timer is stopped.
• Setting these bits enables selection of the operating mode and the pulse edge that fits the pulse-
width count.
• After reset, these bits are initialized to "000
(Note)
After the timer is started, changing the setting is prohibited. Write these bits before
the timer is started or after the timer is stopped.
If the continuous measurement mode is set for the setting marked *, the number of
edges are totaled and the divider for the internal count clock is not cleared at the end
of count. In all other modes, the divider for the internal count clock is cleared at the
end of the count.
Function
". The bits can be read and written. However, "11
B
" to these bits.
B
". These bits can be read and written.
B
"
B
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