Fujitsu MB90460 Series Hardware Manual page 572

Table 20.4-2 A/D Control Status Register 0 (ADCS0)
Bit name
bit2 ANE2 to ANE0:
to A/D conversion end
bit0 channel select bits
• These bits set the A/D conversion end channel.
• When activated, A/D conversion is performed up to the channel specified by these
bits.
• When these bits specify the channel specified by ANS2 to ANS0, just that channel
is converted. In continuous or stop conversion mode, the start channel specified by
ANS2 to ANS0 is converted after the channel specified by these bits. If the start
channel is greater than the end channel, the start channel to AN7 and AN0 to the
end channel are converted in that order in a single series of conversions.
CHAPTER 20 8/10-BIT A/D CONVERTER
Function
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