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CHAPTER 8 MODE SETTING
8.3
Mode Data
The mode data is at memory location FFFFDF
after a reset sequence. The mode data is automatically fetched to the CPU.
■ Mode Data
During a reset sequence, the mode data at address FFFFDF
The CPU uses the mode data to set the memory access mode.
The contents of the mode register can only be changed during the reset sequence. The settings in the
register take effect after the reset sequence.
Figure 8.3-1 shows the mode data configuration.
Mode data
■ Bus Mode Setting Bits
The bus mode setting bits specify operating mode after a reset sequence. Table 8.3-1 lists the relationship
between the bits and functions.
Table 8.3-1 Bus Mode Setting Bits and Functions
M1
0
0
1
1
Note:
Because the MB90460/465 series is only used in single-chip mode, set MD2, MD1, MD0 to 011
set M1, M0 to 00
160
Figure 8.3-1 Mode Data Configuration
bit
7
6
5
4
M1
0
0
M0
M0
0
1
0
1
.
B
, and is used to specify the operation
H
H
3
2
1
0
0
0
0
0
Function extension bits (reserved area)
Bus mode setting bits
Single-chip mode
(Setting not allowed)
is fetched to the mode register in the CPU.
Function
and
B
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