Block Diagram Of The 8/10-Bit A/D Converter - Fujitsu MB90460 Series Hardware Manual

CHAPTER 20 8/10-BIT A/D CONVERTER
20.2

Block Diagram of the 8/10-bit A/D Converter

The 8/10-bit A/D converter has nine blocks, the block diagram is shown in Figure 20.2-1.
■ Block Diagram of the 8/10-bit A/D Converter
φ
: Machine clock
●
A/D control status register (ADCS0/ADCS1)
This register selects activation by software or another activation trigger, the conversion mode, and the A/D
conversion channel. It also enables or disables interrupt requests, checks the interrupt request status, and
indicates whether the conversion has halted or is in progress.
●
A/D data register (ADCR0/ADCR1)
This register holds the result of A/D conversion and selects the resolution for A/D conversion.
544
Figure 20.2-1 Block Diagram of the 8/10-bit A/D Converter
MPX
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
Sample and hold circuit
16-bit reload timer 1
16-bit free-run timer zero detection
φ
AV
AVR AV
CC
SS
D/A converter
Sequential compare register
Comparator
Data register
ADCR0/ADCR1
A/D control register 0
A/D control register 1
Operation clock
Prescaler
ADCS0/
ADCS1