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CHAPTER 15 MULTI-PULSE GENERATOR
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Output Control Register (OPCR)
The Output Control Register (OPCR) is a register which enables the write timing interrupt and flag,
position detect interrupt and flag, sets the data transfer method, and sets the control of the OPT5 to OPT0
and DTTI1 pins.
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Output Data Buffer Register (OPDBRB to OPDBR0)
The Output Data Buffer Register is composed of twelve registers (OPDBRB to OPDBR0). The value of the
OPDBRx register specified by the BNKF, RDA2 to RDA0 bits is loaded into the OPDR register at the
rising edge of the write signal generated by the Data Write Control Unit.
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Output Data Register (OPDR)
The Output Data Register (OPDR) is used to store the output data to the OPT5 to OPT0 pins.
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