Operation Of Hardware Interrupt - Fujitsu MB90460 Series Hardware Manual

F2mc-16lx 16-bit microcontroller
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7.4.1

Operation of Hardware Interrupt

This section explains hardware interrupt operation from generation of a hardware
interrupt request to the completion of interrupt processing.
■ Hardware Interrupt Activation
Peripheral function operation (generation of an interrupt request)
A peripheral function that has a hardware interrupt request function also has an interrupt request flag that
indicates the presence of interrupt requests and an interrupt enable flag that determines whether CPU
interrupt requests are enabled or disabled. The interrupt request flag is set when an event specific to the
peripheral function occurs.
Interrupt controller operation (interrupt request control)
The interrupt controller compares the interrupt levels (IL) of interrupt requests received at the same time.
The interrupt controller selects the request with the highest level (with the smallest IL value) and posts it to
the CPU. When multiple requests have the same level, the request with the smallest interrupt number has
the highest priority.
CPU operation (interrupt request acceptance and interrupt processing)
The CPU compares the received interrupt level (ICR: IL2 to IL0) and the interrupt level mask register
(ILM). If IL < ILM and interrupts are enabled (PS: CCR: I = 1), the CPU activates the interrupt
processing microcode after the instruction currently being executed terminates.
At the beginning of the interrupt processing microcode, the CPU references the ISE bit in the interrupt
control register (ICR). If ISE = 0, the CPU continues the execution of interrupt processing. (If ISE = 1,
2
EI
OS is activated.)
Interrupt processing saves the contents of the dedicated registers (12 bytes including A, DPR, ADB, DTB,
PCB, PC and PS) on the system stack (the system stack space indicated by the SSB and SSP).
The CPU then loads data into the interrupt vector program counters (PCB and PC), updates the ILM, and
sets the stack flag (S) (sets CCR: S = 1 and activates the system stack).
■ Returning from a Hardware Interrupt
In an interrupt processing program, when the interrupt request flag of the peripheral function that generated
the interrupt cause is cleared and the RETI instruction is executed, 12-byte data saved on the system stack
is restored to the dedicated registers and the processing that was being executed before branching for the
interrupt is resumed.
When the interrupt request flag is cleared, interrupt requests output by the peripheral function to the
interrupt controller are automatically canceled.
CHAPTER 7 INTERRUPT
129

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