Fujitsu MB90460 Series Hardware Manual page 326

■ Input Capture Control Status Register, Lower Byte (ICSL23)
Figure 14.4-16 Input Capture Control Status Register (ICSL23)
Address bit7
00006A ICP3 ICP2 ICE3 ICE2 EG31 EG30 EG21 EG20 00000000
H
R/W R/W
R/W : Read and Write
: Initial value
6 5 4 3
R/W R/W R/W
CHAPTER 14 MULTI-FUNCTIONAL TIMER
2 1 0 Initial value
R/W R/W R/W
EG21 EG20
0 0
0 1
1 0
1 1
EG31 EG30
0 0
0 1
1 0
1 1
ICE2 Interrupt request enable bit (input capture 2)
0
1
ICE3 Interrupt request enable bit (input capture 3)
0
1
Interrupt request flag bit (input capture 2)
ICP2
Read
0 No valid edge detected
1 Valid edge detected
Interrupt request flag bit (input capture 3)
ICP3
Read
0 No valid edge detected
1 Valid edge detected
B
Edge selection bit (input capture 2)
No edge detection (stop)
Rising edge detection
Falling edge detection
Both edges detection
Edge selection bit (input capture 3)
No edge detection (stop)
Rising edge detection
Falling edge detection
Both edges detection
Disable interrupt request
Enable interrupt request
Disable interrupt request
Enable interrupt request
Write
Clear this bit
No effect
Write
Clear this bit
No effect
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