Fujitsu MB90460 Series Hardware Manual page 198

■ Block Diagram of Port 2 Pins
Figure 9.5-1 is a block diagram of port 2 pins.
Port data register (PDR)
PDR read
PDR write
Port data direction register (DDR)
DDR write
DDR read
When the resource output enable bit is set, the port is forcibly caused to function as resource
output pins regardless of the value in the DDR2 register.
■ Port 2 Registers
Port 2 registers are PDR2 and DDR2. The bits making up each register correspond to the port 2 pins on a
one-to-one basis. Table 9.5-2 lists the port 2 pins and their corresponding register bits.
Table 9.5-2 Port 2 Pins and their Corresponding Register Bits
Port
PDR2, DDR2
Port 2
Corresponding pin
Figure 9.5-1 Block Diagram of Port 2 Pins
Output latch
Direction latch
Register bits and corresponding port pins
bit7 bit6
P27 P26
Resource output
Resource output enable
Standby control (SPL = 1)
bit5 bit4 bit3
P25 P24 P23
CHAPTER 9 I/O PORT
Resource input
Pin
bit2 bit1
P22 P21
bit0
P20
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