External Interrupt Function - Fujitsu MB90460 Series Hardware Manual

CHAPTER 18 DTP/EXTERNAL INTERRUPT CIRCUIT
18.5.1

External Interrupt Function

The DTP/external interrupt circuit has an external interrupt function that generates an
interrupt request when a selected signal level is input to a DTP/external interrupt pin.
■ External Interrupt Function
If the edge or level selected for a DTP/external interrupt pin by the request level setting register (ELVR) is
detected at that pin, the corresponding ER7 to ER0 bit of the DTP/interrupt cause register (EIRR) is set to
"1". If, in this state, the corresponding interrupt request enable bit of the DTP/interrupt enable register is
set to "1" to enable interrupts (ENIR:EN7 to EN0 = 1), the interrupt cause is reported to the interrupt
controller. The interrupt controller checks the magnitude of the interrupt level (ICR:IL2 to IL0) in relation
to those of the interrupt requests from other peripheral functions, the interrupt priority, etc. The CPU
checks the magnitudes of the interrupt level mask register (PS:ILM2 to ILM0) and the interrupt level, the
interrupt enable bit (PS:CCR: 1), etc. When the interrupt request is accepted by the CPU, the CPU
executes an internal interrupt processing routine (microprogram) and branches to the interrupt processing
routine. In the interrupt processing routine, 0 must be written to the corresponding interrupt request flag bit
to clear the interrupt request.
Notes:
• An ER bit is set to "1" if a DTP/external interrupt cause is generated, regardless of the state of the
corresponding EN bit.
• When the interrupt routine is activated, the ER bit that caused the routine to be activated must be
cleared. If the ER bit is kept at 1, control cannot return from the interrupt. Only clear the flag bit
that caused the interrupt; do not clear the other bits without reason.
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