Reset Operation - Fujitsu MB90460 Series Hardware Manual

4.4

Reset Operation

When a reset is cleared, the memory locations from which the mode data and the reset
vector are read are selected according to the setting of the mode pins, and the mode
setting data is fetched. Mode setting data determines the CPU operating mode and the
execution start address after a reset operation ends.
For power-on or recovery from stop mode by a reset, the mode is fetched after the
oscillation stabilization wait time has elapsed.
■ Overview of Reset Operation
Figure 4.4-1 shows the reset operation flow.
During a reset
Mode fetch
(Reset operation)
Normal operation
(Run state)
■ Mode Pins
Setting the mode pins (MD0 to MD2) specifies how to fetch the reset vector and the mode data. Fetching
the reset vector and the mode data is performed in the reset sequence. See "8.1 Mode Setting", for details
about mode pins.
Figure 4.4-1 Reset Operation Flow
Power-on reset
Stop mode reset
Watchdog timer reset
Oscillation stabilization wait
and reset state
Fetching the mode data
Fetching the reset vector
CPU executes an instruction,
fetching instruction codes from
the address indicates by the
reset vector
CHAPTER 4 RESET
External reset
Software reset
Pin state and function
change associated with
external bus mode
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