A/D Mode Setting Register (Admd) - Fujitsu MB91260B Series Hardware Manual

14.4.2

A/D Mode Setting Register (ADMD)

The A/D mode setting register has a feature to select a conversion mode and to set the
A/D conversion compare time and sampling time.
■ A/D Mode Setting Register (ADMD: ADMD0 to ADMD2)
Address:
ch0 000079
H
ch1 000081
H
ch2 000089
H
rite →
Read/W
Initial value →
R/W: Readable/Writable
: Initial value
bit7 bit6 bit5
MD1 MD0 STS1
R/W R/W R/W
(0) (0) (0)
MD1 MD0
0
0
1
1
CHAPTER 14 8/10-BIT A/D CONVERTER
bit4 bit3 bit2
STS0 CT1 CT0
R/W R/W R/W
(0) (1) (1)
ST1 ST0
9 machine cycles (450 ns @ 20 MHz)
0 0
15 machine cycles (450 ns @ 33 MHz)
0 1
1 0
17 machine cycles (510 ns @ 33 MHz)
1 1 28 machine cycles (840 ns @ 33 MHz)
*: Set the machine cycle to at least 450ns.
CT1 CT0
0 0
12 machine cycles (750 ns @ 16 MHz)
18 machine cycles (720 ns @ 25 MHz)
0 1
24 machine cycles (720 ns @ 33 MHz)
1 0
48 machine cycles (1440 ns @ 33 MHz)
1 1
*: Set the machine cycle to at least 720ns.
STS1 STS0
0 0 Software start
External pin trigger (falling edge) or
0 1
Software start
Multifunction timer
1 0
Software start
External pin trigger (falling edge) or
1 1
Multifunction timer
Software start
*: In the case of unit 0, the timer is 16-bit reload timer 1
or multifunction timer.
A/D conversion mode selection bits
0
Single conversion mode 1 (restarting is enabled during operation)
1
Single conversion mode 2 (restarting is disabled during operation)
0
Continuous conversion mode (restarting is disabled during operation)
1
Stop conversion mode (restarting is disabled during operation)
bit1 bit0
ST1 ST0
R/W R/W
(1) (1)
Sampling time setting bits
Compare time setting bits
A/D start factor selection bits
*
start (rising edge) or
*
start (rising edge) or
*
*
*
*
*
*
*
*
333