Fujitsu MB90460 Series Hardware Manual page 13

CHAPTER 12 16-BIT RELOAD TIMER ........................................................................... 229
12.1 Overview of the 16-bit Reload Timer .............................................................................................. 230
12.2 Block Diagram of the 16-bit Reload Timer ...................................................................................... 233
12.3 16-bit Reload Timer Pins ................................................................................................................ 235
12.4 16-bit Reload Timer Registers ........................................................................................................ 236
12.4.1 Timer Control Status Register, Upper Byte (TMCSRH0/TMCSRH1) ........................................ 237
12.4.2 Timer Control Status Register, Lower Byte (TMCSRL0/TMCSRL1) ......................................... 239
12.4.3 16-bit Timer Register (TMR0/TMR1) ......................................................................................... 241
12.4.4 16-bit Reload Register (TMRD0/TMRD1) .................................................................................. 242
12.5 16-Bit Reload Timer Interrupts ........................................................................................................ 243
12.6 Operation of the 16-bit Reload Timer ............................................................................................. 244
12.6.1 Internal Clock Mode (reload mode) ........................................................................................... 246
12.6.2 Internal Clock Mode (single-shot mode) .................................................................................... 248
12.6.3 Event Count Mode ..................................................................................................................... 250
12.7 Usage Notes on the 16-bit Reload Timer ....................................................................................... 252
12.8 Sample Programs for the 16-bit Reload Timer ............................................................................... 253
CHAPTER 13 16-BIT PPG TIMER .................................................................................. 257
13.1 Overview of 16-bit PPG Timer ........................................................................................................ 258
13.2 Block Diagram of 16-bit PPG Timer ................................................................................................ 259
13.3 16-bit PPG Timer Pins .................................................................................................................... 260
13.4 16-bit PPG Timer Registers ............................................................................................................ 262
13.4.1 PPG Down Counter Register (PDCR0 to PDCR2) .................................................................... 264
13.4.2 PPG Period Setting Buffer Register (PCSR0 to PCSR2) .......................................................... 265
13.4.3 PPG Duty Setting Buffer Register (PDUT0 to PDUT2) ............................................................. 266
13.4.4 PPG Control Status Register (PCNTL0 to PCNTL2, PCNTH0 to PCNTH2) ............................. 267
13.5 16-bit PPG Timer Interrupts ............................................................................................................ 271
13.6 Operation of 16-bit PPG Timer ....................................................................................................... 273
13.7 Usage Notes on the 16-bit PPG Timer ........................................................................................... 276
13.8 Sample Programs for the 16-bit PPG Timer ................................................................................... 277
CHAPTER 14 MULTI-FUNCTIONAL TIMER .................................................................. 279
14.1 Overview of Multi-functional Timer ................................................................................................. 280
14.2 Block Diagram of Multi-functional Timer ......................................................................................... 282
14.3 Multi-functional Timer Pins ............................................................................................................. 286
14.4 Registers of Multi-functional Timer ................................................................................................. 289
14.4.1 Compare Clear Buffer Register (CPCLRB) and Compare Clear Register (CPCLR) ................. 293
14.4.2 Timer Data Register (TCDT) ..................................................................................................... 294
14.4.3 Timer Control Status Register (TCCSH, TCCSL) ...................................................................... 295
14.4.4 Output Compare Buffer Registers (OCCPB0 to OCCPB5) /
Output Compare Registers (OCCP0 to OCCP5) ....................................................................... 299
14.4.5 Compare Control Registers (OCS0 to OCS5) ........................................................................... 301
14.4.6 Input Capture Register (IPCP0 to IPCP3) ................................................................................. 305
14.4.7 Input Capture Control Status Registers (ICS23, PICS01) ......................................................... 306
14.4.8 16-bit Timer Register (TMRR0/TMRR1/TMRR2) ....................................................................... 313
14.4.9 16-bit Timer Control Register (DTCR0/DTCR1/DTCR2) ........................................................... 314
14.4.10 Waveform Control Register (SIGCR) ........................................................................................ 318
viii