Fujitsu MB90460 Series Hardware Manual page 348

■ Timer Interrupts
Two interrupts can be generated from 16-bit free-run timer:
• Compare clear interrupt
• Zero detect interrupt
Compare clear interrupt is generated when the timer value matches compare clear register (CPCLR). Zero
detect interrupt is generated when the timer value reaches "0000
Note:
Software clear (TCCSL:SCLR=1) will not generate zero detect interrupt.
Figure 14.6-6 Interrupts Generated in Up-count Mode (TCCSL:MODE=0)
Counter value
Compare clear interrupt
Zero detect interrupt
Figure 14.6-7 Interrupts Generated in Up-down Count Mode (TCCSL:MODE=1)
Counter value
Compare clear interrupt
Zero detect interrupt
N - 1
N - 1 N
CHAPTER 14 MULTI-FUNCTIONAL TIMER
".
H
N 0
N - 1
1
0
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