Pwc Timer Pins - Fujitsu MB90460 Series Hardware Manual

CHAPTER 16 PWC Timer
16.3

PWC Timer Pins

This section describes the pins of the PWC timer and provides a pin block diagram.
■ PWC Timer Pins
The pins of the PWC timer are shared with the general-purpose ports. Table 16.3-1 lists the functions of
the pins, I/O format, and settings required to use the 16-bit reload timer.
Table 16.3-1 16-bit PWC Timer Pins
Pin name Pin function
Port 0 input-output /
P06/PWI0
timer input
Port 0 input-output /
P07/PWO0
timer output
Port 2 input-output /
P22/PWI1
timer input
Port 2 input-output /
P23/PWO1
timer output
■ Block Diagram of the PWC Timer Pins
Figure 16.3-1 shows the block diagram of the PWC timer 0 pins.
RDR
Port data register (PDR)
PDR read
PDR write
Port data direction register (DDR)
DDR write
DDR read
436
I/O format Pull-up option Standby control
CMOS output /
CMOS input
CMOS output /
CMOS
hysteresis input
Figure 16.3-1 Block Diagram of the PWC Timer 0 Pins
Resource output
Output latch
Direction latch
Selection
allowed
Available
Not
provided
Direct resource input
Resource output enable
Standby control (SPL = 1)
Settings required for pins
Setting for the input port
(DDR0: bit6 = 0)
Setting for timer enable
(PWCSL0: MOD2 to MOD0 not
equal 0)
Setting for the input port
(DDR2: bit2 = 0)
Setting for timer enable
(PWCSL1: MOD2 to MOD0 not
equal 0)
Pull-up resistor
About 50k
Pin