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CHAPTER 14 MULTI-FUNCTIONAL TIMER
■ 16-bit Timer Control Register (DTCR1)
Address
bit 15
DMOD GTEN1 GTEN0 TMIF TMIE TMD2 TMD1 TMD0 00000000
ch.1: 000057
H
R/W
R/W : Read and Write
: Initial value
316
Figure 14.4-21 16-bit Timer Control Register (DTCR1)
14
13
12
R/W
R/W
R/W
TMD2 TMD1 TMD0
GTEN0
GTEN1
DMOD
11
10
9
8
R/W
R/W
R/W
R/W
0
0
0
0
0
1
PPG timer 0 output pulse while RT signal is "H".
The rising edge of each RT signal will trigger
0
1
0
16-bit timer to start. PPG timer 0 output pulse
until the 16-bit timer stopped. (Timer mode)
Generate non-overlap signal by RT signal.
1
0
0
Generate non-overlap signal by PPG timer 0.
1
1
1
Others
TMIE
Interrupt request enable bit
0
Disable an interrupt when the 16-bit timer underflow
1
Enable an interrupt when the 16-bit timer underflow
Interrupt request flag bit
TMIF
Read
0
No counter underflow detected
1
Counter underflow detected
GATE signal control bit 0
0
GATE signal is not controlled by RT2 (asynchronous mode)
1
GATE signal is controlled by RT2 (synchronous mode)
GATE signal control bit 1
0
GATE signal is not controlled by RT3 (asynchronous mode)
1
GATE signal is controlled by RT3 (synchronous mode)
Output polarity control bit
0
Normal polarity output
1
Inverted polarity output
Initial value
B
Operation mode bit
Waveform generator is stopped.
(Dead-time timer mode)
(Dead-time timer mode)
Prohibited
Write
Clear this bit
No effect
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