Fujitsu MB90460 Series Hardware Manual page 229

F2mc-16lx 16-bit microcontroller
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CHAPTER 10 TIME-BASE TIMER
Table 10.3-1 Function Description of Each Bit in the Time-base Timer Control Register (TBTC)
Bit name
RESV:
bit15
Reserved bit
bit14,
Not used
bit13
TBIE:
bit12
Interrupt request
enable bit
TBOF:
bit11
Interrupt request
flag bit
TBR:
bit10
Time-base timer
initialization bit
TBC1, TBC0:
bit9,
Interval
bit8
selection bit
210
(Note)
Always write "1" to this bit.
• When read, the value is undefined.
• Writing has no effect on operation.
• Used to enable or disable the output of an interrupt request to the CPU.
• When this bit and the interrupt request flag bit (TBOF) are "1", an interrupt request is
output.
• This bit is set to "1" when the bit specifying the time-base timer counter overflows.
• When this bit and the interrupt request enable bit (TBIE) are 1, an interrupt request is
output.
• During writing, this bit is cleared with "0". If "1" is written, the bit does not change and
there is no effect.
(Note)
• To clear the TBOF bit, disable the time-base timer
bit or processor status (PS) ILM bit.
• The TBOF bit is cleared by writing "0", by a transition to stop mode, by clearing of the
time-base timer with the TBR bit or by a reset.
• Used to clear the time-base timer counter.
• When "0" is written to this bit, the counter is cleared and the TBOF bit is cleared. If "1" is
written, the bit does not change and there is no effect.
(Reference)
The read value is always "1".
• Used to select an interval timer cycle.
• The bit for the interval timer of the time-base timer counter is specified.
• Four types of interval can be selected.
Function
interrupt by specifying the TBIE

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