Noise Cancellation Control Register (Nccr) - Fujitsu MB90460 Series Hardware Manual

CHAPTER 15 MULTI-PULSE GENERATOR
15.4.8

Noise Cancellation Control Register (NCCR)

The Noise Cancellation Control Register (NCCR) is used to control the noise pulse
width to be cancelled for DTTI1 and SNIx pins.
■ Noise Cancellation Control Register (NCCR)
Address bit 7
00008F S21 S20
H
R/W R/W
X : Indeterminate
R/W : Readable and writable
: Initial value
— : Not used
392
Figure 15.4-13 Noise Cancellation Control Register (NCCR)
6 5 4 3
S11 S10 S01
R/W R/W R/W
2 1 0 Initial value
S00 D1 D0 00000000
R/W R/W R/W
D1 D0
0 0
0 1
1 0
1 1
S01 S00
0 0
0 1
1 0
1 1
S11 S10
0 0
0 1
1 0
1 1
S21 S20
0 0
0 1
1 0
1 1
B
DTTI1 noise width selection bit
Cancel 4-cycle noise.
Cancel 8-cycle noise.
Cancel 16-cycle noise.
Cancel 32-cycle noise.
SNI0 noise width selection bit
Cancel 4-cycle noise.
Cancel 8-cycle noise.
Cancel 16-cycle noise.
Cancel 32-cycle noise.
SNI1 noise width selection bit
Cancel 4-cycle noise.
Cancel 8-cycle noise.
Cancel 16-cycle noise.
Cancel 32-cycle noise.
SNI2 noise width selection bit
Cancel 4-cycle noise.
Cancel 8-cycle noise.
Cancel 16-cycle noise.
Cancel 32-cycle noise.