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APPENDIX
Table A-1 I/O Map (3/6)
Address
Abbreviation
000050
H
TMRR0
000051
H
000052
H
TMRR1
000053
H
000054
H
TMRR2
000055
H
000056
DTCR0
H
000057
DTCR1
H
000058
DTCR2
H
000059
SIGCR
H
00005A
CPCLRB /
H
CPCLR
00005B
H
00005C
H
TCDT
00005D
H
00005E
TCCSL
H
00005F
TCCSH
H
000060
H
IPCP0
000061
H
000062
H
IPCP1
000063
H
000064
H
IPCP2
000065
H
000066
H
IPCP3
000067
H
000068
PICSL01
H
000069
PICSH01
H
00006A
ICSL23
H
00006B
ICSH23
H
00006C
to 6E
H
H
00006F
ROMM
H
630
Register
16-bit timer register 0
16-bit timer register 1
16-bit timer register 2
16-bit timer control register 0
16-bit timer control register 1
16-bit timer control register 2
Waveform control register
Compare clear buffer register / Compare clear
register
Timer data register
Timer control status register
Input capture data register CH.0
Input capture data register CH.0
Input capture data register CH.1
Input capture data register CH.1
Input capture data register CH.2
Input capture data register CH.2
Input capture data register CH.3
Input capture data register CH.3
PPG output control / input capture control status
register 01 (lower byte)
PPG output control / input capture control status
register 01 (upper byte)
Input capture control status register 23 (lower
byte)
Input capture control status register 23 (upper
byte)
ROM mirroring function selection register
Byte access Word access Resource name
-
R/W
-
R/W
-
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
-
R/W
-
R/W
R/W
R/W
R/W
R/W
-
R
-
R
-
R
-
R
-
R
-
R
-
R
-
R
R/W
R/W
R/W
R/W
R/W
R/W
R
R
Prohibited area
W
W
Initial value
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
Waveform
generator
XXXXXXXX
00000000
B
00000000
B
00000000
B
00000000
B
11111111
B
11111111
B
00000000
16-bit
B
free-run timer
00000000
B
00000000
B
-0000000
B
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
16-bit input
capture
XXXXXXXX
(CH.0 to CH.3)
00000000
B
00000000
B
00000000
B
------00
B
ROM mirroring
-------1
B
function
B
B
B
B
B
B
B
B
B
B
B
B
B
B
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