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■ 16-bit Output Compare Interrupts
Table 14.5-3 lists the interrupt control bits and interrupt causes of the 16-bit output compare.
Table 14.5-3 Interrupt Control Bits and Interrupt Causes of the 16-bit Output Compare 0 to 5
Interrupt request flag bit
Interrupt request enable bit
Interrupt cause
In the 16-bit output compare, the IOP0/IOP1 bit of the compare control register (OCS0/OCS2/OCS4) is set
to "1" when 16-bit free-run timer value matches output compare register (OCCP0 to OCCP5). If an
interrupt request is enabled (OCS0/OCS2/OCS4:IOE0/IOE1 = 1) in this operation, the interrupt request is
output to the interrupt controller.
■ 16-bit Output Compare Interrupts and EI
Table 14.5-4 lists the 16-bit output compare interrupts and EI
Table 14.5-4 16-bit Output Compare Interrupts and EI
Channel
Output compare 0 match
Output compare 1 match
Output compare 2 match
Output compare 3 match
Output compare 4 match
Output compare 5 match
*1: The same interrupt control register as that for 16-bit output compare 0 is assigned to A/D conversion termination.
*2: The same interrupt control register as that for 16-bit output compare 1 is assigned to 16-bit PPG timer 1.
*3: The same interrupt control register as that for 16-bit output compare 2 is assigned to 16-bit reload timer 1 underflow.
*4: The same interrupt control register as that for 16-bit output compare 3 is assigned to DTP/external interrupt channels 0/1 detection
DTTI0.
*5: The same interrupt control register as that for 16-bit output compare 4 is assigned to DTP/external interrupt channels 2/3 detection /
DTTI1.
*6: The same interrupt control register as that for 16-bit output compare 5 is assigned to PWC timer 1.
16-bit output compare 0/1
OCS0:IOP0/IOP1
OCS0:IOE0/IOE1
16-bit free-run timer value
matches with output compare
register (OCCP0/OCCP1)
Interrupt control register
Interrupt
number
Register name
*1
#12 (0C
)
ICR00
H
*2
#15 (0F
)
ICR02
H
*3
#17 (11
)
ICR03
H
*4
#19 (13
)
ICR04
H
*5
#21 (15
)
ICR05
H
*6
#23 (17
)
ICR06
H
CHAPTER 14 MULTI-FUNCTIONAL TIMER
16-bit output compare 2/3
OCS2:IOP0/IOP1
OCS2:IOE0/IOE1
16-bit free-run timer value
matches with output compare
register (OCCP2/OCCP3)
2
OS
2
OS
2
OS
Vector table address
Address
Lower
0000B0
FFFFCC
H
H
0000B2
FFFFC0
H
H
0000B3
FFFFB8
H
H
0000B4
FFFFB0
H
H
0000B5
FFFFA8
H
H
0000B6
FFFFA0
H
H
16-bit output compare 4/5
OCS4:IOP0/IOP1
OCS4:IOE0/IOE1
16-bit free-run timer value
matches with output compare
register (OCCP4/OCCP5)
Middle
Upper
FFFFCD
FFFFCE
H
H
FFFFC1
FFFFC2
H
H
FFFFB9
FFFFBA
H
H
FFFFB1
FFFFB2
H
H
FFFFA9
FFFFAA
H
H
FFFFA1
FFFFA2
H
H
2
EI
OS
O
321
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