Fujitsu MB90460 Series Hardware Manual page 427

F2mc-16lx 16-bit microcontroller
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CHAPTER 15 MULTI-PULSE GENERATOR
15.6.4.1
When OPDBR0 Write
The timing change of the output pin OPTx, which is triggered by the OPDBR0 write, is
shown in Figure 15.6-13.
Note:
Word access to Output Data Buffer Register 0 must be used in this operation, byte
access to either lower register or upper register does not start any transfer operation.
The reload timer 0 is free to be used in this operation mode.
■ Timing Generated by OPDBR0 Write (OPS2 to OPS0 = 000
Figure 15.6-13 Timing Generated by OPDBR0 Write (OPS2 to OPS0 = 000
RDA2 to
000
RDA0
(OPDR)
OPDBR0W
OPDBR1W
OPDBR2W
WTO
OP01,
00
OP00
(OPDR)
PPG
OPT0
408
110
01
)
B
)
B
001
11

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