Fujitsu MB90460 Series Hardware Manual page 187

CHAPTER 9 I/O PORT
■ Block Diagram of Port 0 Pins
Figure 9.3-1 is a block diagram of the port 0pins.
RDR
Port data register (PDR)
PDR read
PDR write
Port data direction register (DDR)
DDR write
DDR read
When the resource output enable bit is set, the port is forcibly caused to function as resource output pins
regardless of the value in the DDR0 register.
■ Port 0 Registers
Port 0 registers are PDR0, DDR0 and RDR0. The bits making up each register correspond to the port 0
pins on a one-to-one basis. Table 9.3-2 lists the port 0 pins and their corresponding register bits.
Table 9.3-2 Port 0 Pins and their Corresponding Register Bits
Port
PDR0, DDR0, RDR0
Port 0
Corresponding pin
See "1.7 I/O Circuit Types", for information on the circuit types.
168
Figure 9.3-1 Block Diagram of port 0 Pins
Output latch
Direction latch
Register bits and corresponding port pins
bit7 bit6
P07 P06
Resource output
Direct resource input
Resource output enable
Standby control (SPL = 1)
bit5 bit4
P05 P04
Pull-up resistor
About 50k
Pin
bit3 bit2 bit1
P03 P02 P01
bit0
P00