Multi-Pulse Generator Interrupts - Fujitsu MB90460 Series Hardware Manual

F2mc-16lx 16-bit microcontroller
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CHAPTER 15 MULTI-PULSE GENERATOR
15.5

Multi-pulse Generator Interrupts

The Multi-pulse Generator can generate an interrupt request when in the following
causes:
• Write timing output is generated by the Data Write Control Unit
• Any valid position detection input is detected
• Comparison match between CPD2 to CPD0 of Input Control Register (IPCR: CPD2 to
CPD0) and RDA2 to RDA0 bit of Output Data Register (OPDR: RDA2 to RDA0)
• Compare Clear is generated by the 16-bit Timer
• DTTI1 is changed to low signal level
■ Multi-pulse Interrupts
There are five interrupt causes generated from Multi-pulse Generator, that are as follows:
• Write Timing Interrupt
• Compare Clear Interrupt
• Position Detect Interrupt
• Compare Match Interrupt
• DTTI1 Interrupt
Write Timing Interrupt is multiplexed with Compare Clear Interrupt and Position Detect Interrupt is
multiplexed with Compare Match Interrupt.
Write Timing Interrupt
If the WTIE bit of the Output Control Register (OPCR: WTIE) is set to "1", this Write Timing Interrupt is
generated when the write timing is generated by the Data Write Control Circuit to make data transfer from
one of 12 Output Data Buffer Registers (OPDBRB to OPDBR0) to the Output Data Register (OPDR).
When this interrupt is generated, the write timing interrupt flag bit of the Output Control Register (OPCR:
WTIF) is set to "1".
Compare Clear Interrupt
If the ICRE bit of the Timer Control Register (TCSR: ICRE) is set to "1", this Compare Clear Interrupt is
generated when the 16-bit Timer is underflow.
When this interrupt is generated, the Compare Clear interrupt flag bit of the Timer Control Register (TCSR:
ICLR) is set to "1".
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