Fujitsu MB90460 Series Hardware Manual page 11

4.5 Reset Cause Bits .............................................................................................................................. 73
4.6 Status of Pins in a Reset .................................................................................................................. 75
CHAPTER 5 CLOCK ....................................................................................................... 77
5.1 Clock ................................................................................................................................................. 78
5.2 Block Diagram of the Clock Generation Block .................................................................................. 80
5.3 Clock Selection Register (CKSCR) ................................................................................................... 82
5.4 Clock Mode ....................................................................................................................................... 84
5.5 Oscillation Stabilization Wait Interval ................................................................................................ 86
5.6 Connection of an Oscillator or an External Clock to the Microcontroller ........................................... 87
CHAPTER 6 LOW POWER CONSUMPTION MODE ..................................................... 89
6.1 Low Power Consumption Mode ........................................................................................................ 90
6.2 Block Diagram of the Low Power Consumption Control Circuit ........................................................ 92
6.3 Low Power Consumption Mode Control Register (LPMCR) ............................................................. 94
6.4 CPU Intermittent Operation Mode .................................................................................................... 97
6.5 Standby Mode ................................................................................................................................... 98
6.5.1 Sleep Mode ................................................................................................................................. 99
6.5.2 Time-base Timer Mode ............................................................................................................. 102
6.5.3 Stop Mode ................................................................................................................................. 104
6.6 State Change Diagram ................................................................................................................... 106
6.7 State of Pins in Standby Mode and during Reset ........................................................................... 109
6.8 Usage Notes on Low Power Consumption Mode ........................................................................... 110
CHAPTER 7 INTERRUPT ............................................................................................. 113
7.1 Interrupt .......................................................................................................................................... 114
7.2 Interrupt Causes and Interrupt Vectors ........................................................................................... 116
7.3 Interrupt Control Registers and Peripheral Functions ..................................................................... 119
7.3.1 Interrupt Control Registers (ICR00 to ICR15) ........................................................................... 121
7.3.2 Interrupt Control Register Functions .......................................................................................... 123
7.4 Hardware Interrupt .......................................................................................................................... 126
7.4.1 Operation of Hardware Interrupt ................................................................................................ 129
7.4.2 Processing for Interrupt Operation ............................................................................................ 131
7.4.3 Procedure for using Hardware Interrupt .................................................................................... 132
7.4.4 Multiple Interrupts ...................................................................................................................... 133
7.4.5 Hardware Interrupt Processing Time ......................................................................................... 135
7.5 Software Interrupt ........................................................................................................................... 137
7.6 Interrupt of Extended Intelligent I/O Service (EI
7.6.1 Extended Intelligent I/O Service (EI
7.6.2 Registers of EI
7.6.3 Operation of the Extended Intelligent I/O Service (EI
7.6.4 Procedure for using the Extended Intelligent I/O Service (EI
7.6.5 Processing Time of the Extended Intelligent I/O Service (EI
7.7 Exception Processing Interrupt ....................................................................................................... 149
7.8 Stack Operations for Interrupt Processing ...................................................................................... 150
7.9 Sample Programs for Interrupt Processing ..................................................................................... 152
2
OS) Descriptor (ISD) ........................................................ 141
2
OS Descriptor (ISD) ......................................................................................... 142
2
OS) ..................................................................... 139
2
OS) ........................................................ 145
2
OS) ............................................ 146
2
OS) ............................................. 147
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