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CHAPTER 14 MULTI-FUNCTIONAL TIMER
14.5
Multi-functional Timer Interrupts
The multi-functional timer is enabled to generate interrupts in 16-bit free-run timer, 16-
bit output compare, 16-bit input capture and waveform generator.
■ 16-bit Free-run Timer Interrupts
Table 14.5-1 lists the interrupt control bits and interrupt causes of the 16-bit free-run timer.
Table 14.5-1 Interrupt Control Bits and Interrupt Causes of the 16-bit Free-run Timer
Interrupt request flag bit
Interrupt request enable bit
Interrupt cause
In the 16-bit free-run timer, the ICLR bit of the timer control status register (TCCSH) is set to "1" when
timer value matches compare clear register (CPCLR). If an interrupt request is enabled (TCCSH:ICRE =
1) in this operation, the interrupt request is output to the interrupt controller.
The IRQZF bit of the timer control status register (TCCSH) is set to "1" when timer value equals "0000
If an interrupt request is enabled (TCCSH:IRQZE = 1) in this operation, the interrupt request is output to
the interrupt controller.
■ 16-bit Free-run Timer Interrupts and EI
Table 14.5-2 lists the 16-bit free-run timer interrupts and EI
Table 14.5-2 16-bit Free-run Timer Interrupts and EI
Interrupt
Channel
number
*1
#34 (22
Compare clear
*2
#31 (1F
Zero detect
*1: The same interrupt control register as that for 16-bit free-run timer compare clear is assigned to 16-bit input capture
channels 0/1.
*2: The same interrupt control register as that for 16-bit free-run timer zero detect is assigned to 16-bit PPG timer 2.
320
Compare Clear
TCCSH:ICLR
TCCSH:ICRE
16-bit free-run timer value matches with
compare clear
register (CPCLR)
Interrupt control register
Register name
)
ICR11
H
)
ICR10
H
16-bit free-run timer
TCCSH:IRQZF
TCCSH:IRQZE
16-bit free-run timer value equals zero
2
OS
2
OS.
2
OS
Vector table address
Address
Lower
0000BB
FFFF74
H
0000BA
FFFF80
H
Zero Detect
Middle
Upper
FFFF75
FFFF76
H
H
H
FFFF81
FFFF82
H
H
H
".
H
2
EI
OS
∆
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