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14.6.4.3
Operation of DTTI0 Pin Control
By setting "1" to waveform control register, SIGCR: bit7 (DTIE), the output of RTO0 to RTO5
can be controlled by the DTTI0 pin. When "L" level in DTTI0 is detected, the output of RTO0
to RTO5 will be fixed to an inactive level until the interrupt flag, SIGCR: bit6 (DTIF) is
cleared. The inactive level of RTO0 to RTO5 can be set by PDR3 in port 3 by software.
■ DTTI0 Pin Input Operation
Even when the "L" level of DTTI0 pin input is detected, the timer will keep running for the waveform
generator operation, but no waveform will outputted to external pins P30/RTO0 to P35/RTO5.
Setting up registers:
• TCDT
• TCCS
• OCCP0 to OCCP5 : XXXX
• PDR3
• TMRR0 to TMRR2 : XXXX
• SIGCR
Note:
"X" must be set according to the operation.
16-bit free-run timer
FFFF
BFFF
Count value
7FFF
3FFF
0000
Compare register 0
value
Compare register 1
value
RT1
RTO0
RTO1
DTTI0
DTIF
Figure 14.6-29 Operation when DTTI0 Input is enabled
: 0000
H
: XXXXXXXXXX0X0XXX
(Compare value)
H
: XXXXXX00
(Inactive level setting)
B
(Non-overlap timing setting)
H
: 1XXXXXXX
(DTTI0 input and 16-bit timer count clock setting)
B
H
H
H
H
H
BFFF
H
7FFF
H
CHAPTER 14 MULTI-FUNCTIONAL TIMER
• CPCLR
B
• OCS0 to OCS5
• DTCR0 to DTCR2 : 0XXXX100
Output inactive
Software Clear
: XXXX
(Cycle setting)
H
: -XX1XXXXXXXXXX11
B
B
Time
347
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